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- Academic unit or major
- Undergraduate major in Mathematical and Computing Science
- Instructor(s)
- Endo Toshio Sakamoto Ryuichi
- Class Format
- Lecture / Exercise
- Media-enhanced courses
- Day/Period(Room No.)
- -
- Group
- -
- Course number
- MCS.T233
- Credits
- 3
- Academic year
- 2024
- Offered quarter
- 4Q
- Syllabus updated
- 2024/3/14
- Lecture notes updated
- -
- Language used
- Japanese
- Access Index
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Course description and aims
Modern computers consist of digital circuits implemented on silicon wafers. However, humans program with textual, high-level programming languages such as C++ and Python, and it is not obvious how abstract computing models that humans perceive are actually executed on hardware. In practice, there are many layers involved in the execution, and for this particular course, first we study language abstraction at the lowest level, namely machine languages, and then how hardware can be constructed to interpret and execute such machine languages. In the lab course we will also learn structure of processors by constructing a CPU simulator.
Student learning outcomes
The goal of this course is to learn the hardware architectural concepts of computers, how they execute the programs in principle. Also, we will cover recent advances in computer architectures, especially techniques to attain speed and execution efficiency, in order to attain insights into how an efficient computing infrastructure can be constructed.
We will first be learning the lowest level programming language, namely machine language, and will then learn how hardware components such as ALUs and memory devices are designed with digital circuits. This will allow students to come to a complete understanding of the abstraction layers of computers based on the von Neumann architecture.
Keywords
Computer architecture, machine language, instruction set architecture, logical circuits, logic gates, expression of numbers, floating point numbers, adders, ALU, combinatorial circuits, truth table, sequentical circuits, data path, single cycle execution, multi cycle execution, pipelining, out-of-order execution, memory, DRAM, sram, memory hierarchy, cache, performance, throughput, latency, parallelism, multi-core, GPU, supercomputers
Competencies that will be developed
| ✔ Specialist skills | Intercultural skills | Communication skills | Critical thinking skills | ✔ Practical and/or problem-solving skills |
Class flow
For each lecture class a set of PowerPoint slides will be distributed in T2SCHOLA. The lab course will have an assignment every classes, and a report is to be submitted for each assignment. The grade will be determined based on the combination of the score of the final exam and the submitted reports.
Course schedule/Required learning
| Course schedule | Required learning | |
|---|---|---|
| Class 1 | Introduction of lecture series, computing history | Not specified |
| Class 2 | Introduction to computer architecture, assembly / machine language (1) arithmetic and logical instructions, load/store instructions | Not specified |
| Class 3 | Assembly / machine language (2): load/store instructions, control instructions, implementing procedures | Not specified |
| Class 4 | From logic gates to processor (1): combinatorial circuits and adders | Not specified |
| Class 5 | From logic gates to processor (2): ALU, control, sequential circuits | Not specified |
| Class 6 | From logic gates to processor (3): memory by sequential circuits | Not specified |
| Class 7 | From logic gates to processor (4): Basic structure of a processor | Not specified |
| Class 8 | Improvement of arithmetic operations and floating point numbers | Not specified |
| Class 9 | Structure of memory (1): DRAM and SRAM | Not specified |
| Class 10 | Structure of memory (2): Cache memory technology | Not specified |
| Class 11 | Advance of processors (1): Speedup by pipelining | Not specified |
| Class 12 | Advance of processors (2): Out of order execution | Not specified |
| Class 13 | Advance of processors (3): Various parallelizing technology | Not specified |
| Class 14 | Supercomputers | Not specified |
Out-of-Class Study Time (Preparation and Review)
To enhance effective learning, students are encouraged to spend a certain length of time outside of class on preparation and review (including for assignments), as specified by the Tokyo Institute of Technology Rules on Undergraduate Learning (東京工業大学学修規程) and the Tokyo Institute of Technology Rules on Graduate Learning (東京工業大学大学院学修規程), for each class.
They should do so by referring to textbooks and other course material.
Textbook(s)
Not Specified
Reference books, course materials, etc.
Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann Publishers.
Assessment criteria and methods
The grade will be determined based on the combination of the score of the final exam and the submitted reports.
Related courses
- MCS.T204 ： Introduction to Computer Science
- MCS.T214 ： Theory of Automata and Languages
- MCS.T314 ： Operating Systems
- MCS.T334 ： Compiler Construction
Prerequisites (i.e., required knowledge, skills, courses, etc.)
Basic knowledge of programming, and Boolean logic
