2019 Computer Logic Design (ICT)

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Academic unit or major
Undergraduate major in Information and Communications Engineering
Isshiki Tsuyoshi  Watanabe Yoshihiro 
Course component(s)
Day/Period(Room No.)
Tue7-8(S422)  Fri7-8(S422)  
Course number
Academic year
Offered quarter
Syllabus updated
Lecture notes updated
Language used
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Course description and aims

This class covers the basic design methodologies for software components (instruction-set, assembly language) and hardware components (memory, register, arithmetic circuits, bus) of computer systems.

Student learning outcomes

Obtain basic understanding of computer architecture on software/hardware components.
Obtain skills for assembly language programming.
Obtain skills for modeling hardware behaviors with register transfer descriptions.
Obtain skills for designing computer logic circuits.


Computer, logic circuit, software, hardware, assembly language, register transfer description, instruction execution control

Competencies that will be developed

Specialist skills Intercultural skills Communication skills Critical thinking skills Practical and/or problem-solving skills

Class flow

Software components (instruction set, assembly language) and hardware components (logic circuit, register transfer description) will be described in each lecture.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Introduction to computer architecture : software (instruction set, assembly language) and hardware components (memory, register, arithmetic logic, bus) Understand the overall computer architecture
Class 2 Data formats and arithmetic logic : binary data, 2's complement, add/subtract logic circuits Understand computation mechanisms on logic circuit
Class 3 Instruction set : instruction format, memory addressing, assembly language, machine language Understand instruction set structure
Class 4 Assembly language programming 1 : add/subtract, arithmetic/logic shifts, multiplications Understand assembly programming
Class 5 Assembly language programming 2 : loop control, indirect addressing, subroutine
Class 6 Instruction execution control : instruction fetch, instruction execution cycles Understand instruction execution flow
Class 7 IO devices and interrupts, interrupt cycles Understand interrupt mechanism for handling IO devices
Class 8 Register design Understand register design and control logic design
Class 9 Bus design Understand data transfer between memory and registers via shared bus
Class 10 Arithmetic logic unit design Understand arithmetic logic circuit design
Class 11 Hardware description language 1 Understand hardware description language, logic circuit design and logic simulation
Class 12 Hardware description language 2 Understand descriptions of module, hierarchy, signal, expression, and constants
Class 13 Hardware description language 3 Understand descriptions of combinational and sequential logic
Class 14 Logic circuit descriptions for computer systems Understand behaviors and descriptions of decoder, encoder, multiplexer, tri-state buffer, arithmetic logic unit, and counter
Class 15 Logic circuit design methods and their applications Understand descriptions of synchronous circuit designs and their applications


Will be distributed via OCW-i

Reference books, course materials, etc.

Computer Architecture, M.Morris Mano, Kagakugijutsu Shuppan, 1999
Computer Architecture, D.A. Patterson, J.L. Hennesy, Nikkei BP, 2014

Assessment criteria and methods

Grades based on final examination and in-class exercises on computer architecture, assembly programming, register transfer description, arithmetic logic design and hardware description language.

Related courses

  • ICT.I211 : Theory and Design of Logic Circuits
  • ICT.E304 : Experiments of Inforamtion and Communications Engineering III
  • ICT.I308 : Computer Architecture (ICT)
  • ICT.I415 : VLSI System Design
  • ICT.I317 : Embedded Systems

Prerequisites (i.e., required knowledge, skills, courses, etc.)

Basic knowledge on logic circuit design is required.

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