2024 | Memory Devices - TOKYO TECH OCW

2024　Memory Devices

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Academic unit or major: Undergraduate major in Electrical and Electronic Engineering

Instructor(s): Kakushima Kuniyuki

Class Format: Lecture

Media-enhanced courses

Day/Period(Room No.): -

Group: -

Course number: EEE.D371

Credits: 1

Academic year: 2024

Offered quarter: 3Q

Syllabus updated: 2024/4/8

Lecture notes updated: -

Language used: Japanese

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Syllabus

Course description and aims

Various memory devices have been implemented in digital integrated circuits depending on the speed or volume requirements. The lecture will include the memory hierarchy and its specification. The structure of each memory (SRAM, DRAM, Flash, FeRAM, MRAM, RRAM, PCRAM, etc.), its physical operation mechanism, and the peripheral circuits will be explained. In addition, recent development trends will be reviewed.

Student learning outcomes

Students who take the course will understand the memory hierarchy, its required specifications, and the memory operation principles of each device. They can assess which part of the hierarchy should implement the memory devices from the specification.

Keywords

memory system, memory hierarchy, SRAM, DRAM, Flash, FeRAM, MRAM, RRAM, PCRAM, peripheral circuits

Competencies that will be developed

Specialist skills	Intercultural skills	Communication skills	✔ Critical thinking skills	Practical and/or problem-solving skills
✔ ・Fundamental specialist skills in EEE

Class flow

The lecture will use slides. An exercise will be delivered at each lecture.

Course schedule/Required learning

	Course schedule	Required learning
Class 1	Basics of semiconductor and memory system	Operation of semiconductor device, memory hierarchy, operation of memory devices
Class 2	SRAM (static random access memory)	CMOS inverter, bi-stable circuit, flip-flop, latch, SRAM
Class 3	DRAM (dynamic random access memory)	Capacitor, refresh, DRAM, device scaling
Class 4	Flash memory	Charge trapping, threshold, three-dimensional architecture, non-volatile memory
Class 5	FeRAM (ferroelectric random access memory)	Ferroelectric material, spontaneous polarization, polarization reversal, non-volatile memory
Class 6	MRAM (magnetic random access memory)	Magnetic tunnel junction, magnetic spin reversal, MRAM, non-volatile memory
Class 7	Other nonvolatile memory, analog memory	Resistive memory, phase-change memory, analog memory, in-memory computing

Out-of-Class Study Time (Preparation and Review)

To enhance effective learning, students are encouraged to read and understand research and academic journals on the topic of each lecture.

Textbook(s)

Not specified

Reference books, course materials, etc.

Course materials will be provided

Assessment criteria and methods

Evaluation will be based on each exercise and term-end report. (exercise 20%, report 80%)

Related courses

EEE.C341 ： Integrated Circuit Technology Integrated Circuit Technology
EEE.D352 ： Electron Devices II
EEE.C321 ： Digital Electronic Circuits

Prerequisites (i.e., required knowledge, skills, courses, etc.)

Not particularly

TOKYO INSTITUTE OF TECHNOLOGY