2019 Semiconductor Fabrication Process

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Academic unit or major
Undergraduate major in Electrical and Electronic Engineering
Instructor(s)
Miyamoto Yasuyuki 
Course component(s)
Lecture
Day/Period(Room No.)
Wed1-2(S223)  
Group
-
Course number
EEE.D391
Credits
1
Academic year
2019
Offered quarter
4Q
Syllabus updated
2019/3/18
Lecture notes updated
-
Language used
Japanese
Access Index

Course description and aims

Principles and limitations of micro-fabrication process in semiconductor devices for high-speed operation are described. After explanation of requirement of simultaneous miniaturization in vertical direction and lateral direction for high speed operations, latest technology with focus on lithography are explained. Then, formation of doped region, etching, oxidation, film formation, electrode and wiring are described.

Student learning outcomes

By the end of this course, students will be able to:
1) Explain outlines of semiconductor processes which fabricated integrated circuit for popularization of cheap and high-speed electric circuits.
2) Understand the guidelines for more integration and higher speed.
3) Understand the method for miniaturization based on the scaling from principle operation of MOSFETs.

Corresponding educational goals are:
(1) Specialist skills Fundamental specialist skills
(4) Applied skills (inquisitive thinking and/or problem-finding skills) Organization and analysis
(7) Skills acquiring a wide range of expertise, and expanding it into more advanced and other specialized areas

Keywords

Lithography, formation of doped region, etching, oxidation, film formation, electrode, wiring

Competencies that will be developed

Intercultural skills Communication skills Specialist skills Critical thinking skills Practical and/or problem-solving skills
- - -

Class flow

Because treated amount of knowledge is huge, each lecture asks simple calculation as homework. Any textbook or notebook can be used as reference in test level of understanding.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Requirements of semiconductor fabrication process and basis of optical lithography Calculation of diffraction images with or without alternative phase shift method
Class 2 Present and future status of optical lithography and electron beam lithography Calculation of proximity correction in electron beam lithography
Class 3 Short channel effect and doped region Evaluation of contact by transfer line method
Class 4 Scaling and oxide Calculation of SiO2 oxide thickness by some conditions
Class 5 Strained silicon, multi-gate, crystal growth, SOI、etching Anisotropic etching of Si
Class 6 Present memory structure, delay of wiring, TSV, deposition Calculation of wiring delay
Class 7 Electrode and wiring TFT requirement
Class 8 Test level of understanding with exercise problems and summary of the course - Solve exercise problems - Test level of understanding and self-evaluate achievement for classes 1–7.

Textbook(s)

N/A

Reference books, course materials, etc.

Distributed by OCW-i

Assessment criteria and methods

Evaluate based on the students' knowledge of semiconductor processes.
42 %: Sum of homework, 58%:Test level of understanding

Related courses

  • EEE.D351 : Electron Devices I
  • EEE.D352 : Electron Devices II

Prerequisites (i.e., required knowledge, skills, courses, etc.)

NA

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