Print

2016　Computer Architecture I

Font size  SML

Register update notification mail Add to favorite lecture list
Academic unit or major
Computer Science
Instructor(s)
Kise Kenji 
Class Format
Lecture     
Media-enhanced courses
Day/Period(Room No.)
Mon5-6(W611)  
Group
O
Course number
ZUS.P302
Credits
2
Academic year
2016
Offered quarter
1-2Q
Syllabus updated
2016/4/27
Lecture notes updated
-
Language used
Japanese
Access Index

Course description and aims

This course aims to provide students with basic technologies of computer architecture with mainly focusing on processor and memory system which plays an important role in the downsizing, personalization, and improvement of performance and power consumption of computer systems such as PCs, personal mobile devices, and embedded systems.

Student learning outcomes

By taking this course, students will learn roles and basic principles of various elements for computer system like processor, memory, cache, virtual memory, and input/output device.

Keywords

Computer Architecture, Instruction Set Architecture, Processor, Cache, RAID, Virtual Memory

Competencies that will be developed

✔ Specialist skills Intercultural skills Communication skills Critical thinking skills Practical and/or problem-solving skills

Class flow

Before coming to class, students should read the course schedule and check what topics will be covered. Required learning should be completed outside of the classroom for preparation and review purposes.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Basic Structure of Computer Systems After the class, exercise problems on Components of Computer Systems will be given for report.
Class 2 Instruction Set Architecture: Data Representation and Addressing
Class 3 Instruction Set Architecture: Arithmetic and Logic Instructions
Class 4 Instruction Set Architecture: Load/Store and Branch Instructions
Class 5 Basic Components of Processor
Class 6 Datapath for Single-Cycle Processor
Class 7 Control for Single-Cycle Processor
Class 8 Strategies for High Performance Processor After the class, exercise problems on Single-Cycle Processor will be given for mid-term report.
Class 9 Memory System
Class 10 Memory Hierarchy and Cache System
Class 11 Set Associative Cache
Class 12 Performance of Memory System
Class 13 Hard Disk and RAID
Class 14 Virtual Memory System
Class 15 Input/output Device and Interrupt

Textbook(s)

None required.

Reference books, course materials, etc.

1) David A. Patterson, John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface (Fifth Edition). Morgan Kaufmann. ASIN: B00G4N7I2K.
2) Muraoka Yoichi. Computer Architecture. Kindaikagaku-sya. ISBN: 978-4764901100 (Japanese)
3) Tomita Shinji, Murakami Kazuaki. Computer System Engineering. Shoko-do, ISBN: 978-4785601225 (Japanese)
4) Tomita Shinji, Nakashima Hiroshi, Computer Hardware. Shoko-do, ISBN: 978-4785620448 (Japanese)
5) Hashimoto Akihiro. Computer Architecture. Shoko-do, ISBN: 978-4785620271 (Japanese)

Assessment criteria and methods

Students will be assessed on their understanding of Instruction Set Architecture, Processor, Memory System, Hard Disk, RAID, Virtual Memory, Input/output Device, and Interrupt. Students’ course scores are based on reports (20%) and final exam (80%).

Related courses

  • ICT.I216 ： Computer Logic Design (ICT)
  • ZUS.P303 ： Computer Architecture II
  • ZUS.P301 ： Operating Systems

Prerequisites (i.e., required knowledge, skills, courses, etc.)

No prerequisites are necessary, but enrollment in the related course of Computer Logic Design is desirable.

Contact information (e-mail and phone)    Notice : Please replace from "[at]" to "@"(half-width character).

Kise Kenji: kise[at]cs.titech.ac.jp, 03-5734-3698

Office hours

Contact by e-mail in advance to schedule an appointment.

Page Top