Modern computers consist of digital circuits implemented on silicon wafers. However, humans program with textual, high-level programming languages such as C++ and Python, and it is not obvious how abstract computing models that humans perceive are actually executed on hardware. In practice, there are many layers involved in the execution, and for this particular course, first we study language abstraction at the lowest level, namely machine languages, and then how hardware can be constructed to interpret and execute such machine languages. In the lab course we will also learn structure of processors by constructing a CPU simulator.
The goal of this course is to learn the hardware architectural concepts of computers, how they execute the programs in principle. Also, we will cover recent advances in computer architectures, especially techniques to attain speed and execution efficiency, in order to attain insights into how an efficient computing infrastructure can be constructed.
We will first be learning the lowest level programming language, namely machine language, and will then learn how hardware components such as ALUs and memory devices are designed with digital circuits. This will allow students to come to a complete understanding of the abstraction layers of computers based on the von Neumann architecture.
Computer architecture, machine language, addressing, von Neumann machine, digital circuits, adders, expressing values with binary numbers, ALU, combinatorial logic, truth table, finite state logic, data path, single cycle execution, multi cycle execution, finite state machine / automaton, microprograming, pipelining, storage / memory, DRAM, memory hierarchy, cache, I/O, hard disk, flash memory, performance, parallelism.
✔ Specialist skills | Intercultural skills | Communication skills | Critical thinking skills | ✔ Practical and/or problem-solving skills |
For each lecture class a set of PowerPoint slides will be distributed prior to the class. The lab course will have an assignment every one or two classes, and a report is to be submitted for each assignment. The grade will be determined based on the combination of the score of the final exam and the submitted reports.
Course schedule | Required learning | |
---|---|---|
Class 1 | Introduction of lecture series, computing history | Not specified |
Class 2 | Introduction to computer architecture, assembly / machine language (1) arithmetic and logical instructions | Not specified |
Class 3 | Assembly / machine language (2): load/store instructions, control instructions | Not specified |
Class 4 | Assembly / machine language (3): implementing procedures and functions, different instruction set architectures | Not specified |
Class 5 | Performance of computers (1): performance modeling | Not specified |
Class 6 | Performance of computers (2): various performance metrics | Not specified |
Class 7 | Introduction to digital circuits (1): combinatorial logic, truth table, and disjunctive normal form | Not specified |
Class 8 | Introduction to digital circuits (2): Expressing values with binary numbers, implementing ALUs | Not specified |
Class 9 | Introduction to digital circuits (3): various finite state logics and their design | Not specified |
Class 10 | CPU architecture (1): single cycle implementation | Not specified |
Class 11 | CPU architecture (2): multi cycle implementation | Not specified |
Class 12 | CPU acceleration: pipelining and superscalar | Not specified |
Class 13 | Memory hierarchy, cache memory, and virtual memory | Not specified |
Class 14 | Communication networks | Not specified |
To enhance effective learning, students are encouraged to spend a certain length of time outside of class on preparation and review (including for assignments), as specified by the Tokyo Institute of Technology Rules on Undergraduate Learning (東京工業大学学修規程) and the Tokyo Institute of Technology Rules on Graduate Learning (東京工業大学大学院学修規程), for each class.
They should do so by referring to textbooks and other course material.
Not Specified
Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann Publishers, 2014.
The grade will be determined based on the combination of the score of the final exam and the submitted reports.
Basic knowledge of programming, and Boolean logic