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2016　Computer Systems

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Academic unit or major
Undergraduate major in Mathematical and Computing Science
Instructor(s)
Matsuoka Satoshi  Endo Toshio 
Class Format
Lecture / Exercise     
Media-enhanced courses
Day/Period(Room No.)
Tue5-6(W621)  Fri5-8(W621)  
Group
-
Course number
MCS.T233
Credits
3
Academic year
2016
Offered quarter
4Q
Syllabus updated
2017/1/11
Lecture notes updated
-
Language used
Japanese
Access Index

Course description and aims

Modern computers consist of digital circuits implemented on silicon wafers. However, humans program with textual, high-level programming languages such as C++ and Python, and it is not obvious how abstract computing models that humans perceive are actually executed on hardware. In practice, there are many layers involved in the execution, and for this particular course, first we study language abstraction at the lowest level, namely machine languages, and then how hardware can be constructed to interpret and execute such machine languages. In the lab course we will also learn how to construct physical computers.

Student learning outcomes

The goal of this course is to learn the hardware architectural concepts of computers, how they execute the programs in principle. Also, we will cover recent advances in computer architectures, especially techniques to attain speed and execution efficiency, in order to attain insights into how an efficient computing infrastructure can be constructed.
We will first be learning the lowest level programming language, namely machine language, and will then learn how hardware components such as ALUs and memory devices are designed with digital circuits. This will allow students to come to a complete understanding of the abstraction layers of computers based on the von Neumann architecture.

Keywords

Computer architecture, machine language, addressing, von Neumann machine, digital circuits, adders, expressing values with binary numbers, ALU, combinatorial logic, truth table, finite state logic, data path, single cycle execution, multi cycle execution, finite state machine / automaton, microprograming, pipelining, storage / memory, DRAM, memory hierarchy, cache, paging. MMU, I/O, data bus, PCI. hard disk, flash memory, performance, Amdahl’s law.

Competencies that will be developed

✔ Specialist skills Intercultural skills Communication skills Critical thinking skills ✔ Practical and/or problem-solving skills

Class flow

For each lecture class a set of PowerPoint slides will be distributed prior to the class, and it is expected that the student will study the material prior to the class. The lecture itself will proceed interactively. The lab course will have an assignment every one or two classes, and a report is to be submitted for each assignment. The grade will be determined based on the combination of the score of the final exam and the submitted reports.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Introduction to computer systems, computing history Slides to be studied prior to class
Class 2 Introduction to computer architecture, assembly / machine language (1) arithmetic and logical instructions Slides to be studied prior to class
Class 3 Assembly / machine language (2): load/store instructions, control instructions Slides to be studied prior to class
Class 4 Assembly / machine language (3): implementing procedures and functions, different instruction set architectures Slides to be studied prior to class
Class 5 Performance of computers (1): performance modeling Slides to be studied prior to class
Class 6 Performance of computers (2): various performance metrics Slides to be studied prior to class
Class 7 Introduction to digital circuits (1): combinatorial logic, truth table, and disjunctive normal form Slides to be studied prior to class
Class 8 Introduction to digital circuits (2): Expressing values with binary numbers, implementing ALUs Slides to be studied prior to class
Class 9 Introduction to digital circuits (3): various finite state logics and their design Slides to be studied prior to class
Class 10 CPU architecture (1): single cycle implementation Slides to be studied prior to class
Class 11 CPU architecture (2): multi cycle implementation Slides to be studied prior to class
Class 12 CPU acceleration: pipelining and superscalar Slides to be studied prior to class
Class 13 Memory hierarchy, cache memory, and virtual memory Slides to be studied prior to class
Class 14 various I/O and communication networks Slides to be studied prior to class
Class 15 hardware security technologies Slides to be studied prior to class

Textbook(s)

Not Specified

Reference books, course materials, etc.

Not specified

Assessment criteria and methods

The grade will be determined based on the combination of the score of the final exam and the submitted reports (50% each).

Related courses

  • MCS.T334 ： Compiler Construction
  • MCS.T214 ： Theory of Automata and Languages

Prerequisites (i.e., required knowledge, skills, courses, etc.)

Basic knowledge of automata theory, programming, and Boolean logic

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