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2019　VLSI Layout Design

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Academic unit or major
Graduate major in Information and Communications Engineering
Instructor(s)
Takahashi Atsushi 
Class Format
Lecture     
Media-enhanced courses
Day/Period(Room No.)
Tue3-4(S323)  Fri3-4(S323)  
Group
-
Course number
ICT.I419
Credits
2
Academic year
2019
Offered quarter
4Q
Syllabus updated
2019/3/18
Lecture notes updated
-
Language used
English
Access Index

Course description and aims

VLSIs that support information and communications engineering are realized through system and behavior design, logic and circuit design, layout design, and performance verification. Among these design stages, layout design is often called physical design or place and route by the procedures included in it. The purpose of this lecture is to understand the fact that layout design is one of the most important design stages by which the performance of VLSI is highly affected, and to acquire basic layout design methods.

Student learning outcomes

By the end of this course, students will be able to:
1) Understand and explain the overview of VLSI layout design
2) Acquire basic design methods and apply them to solove basic problems
3) Understandand explain the most of layout design problems are formulated by utilizing combinational aspect of them
4) Understand and explain approaches to tackle unsolved problems.

Keywords

Layout, Partition, Placement, Routing

Competencies that will be developed

✔ Specialist skills Intercultural skills Communication skills Critical thinking skills Practical and/or problem-solving skills

Class flow

The overview of VLSI design is surveyed, and recent topics and methods for them as well as research topics that are requested to be solved in VLSI layout design are introduced. It is shown that the most of layout design problems are formulated by utilizing combinational aspect of them, and algorithms for them are introduced according to layout design process. Solved problems as well as unsolved problems are specified, and gives research topics.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Layout design in VLSI design Explain the overview of layout design
Class 2 Layout design process Explain the overview of layout design process
Class 3 Circuit partitioning (1) equal size partitioning Explain the overview of methods for equal size partitioning
Class 4 Circuit partitioning (2) size constraint partitioning Explain the overview of methods for size constraint partitioning
Class 5 Circuit partitioning (3) logic partitioning Explain the overview of methods for logic partitioning
Class 6 Placement (1) floorplan Explain the overview of floorplan
Class 7 Placement (2) placement Explain the overview of placement
Class 8 Placement (3) representation Explain the overview of representations for placement
Class 9 Placement (4) search method Explain the overview of search methods for placement
Class 10 Routing (1) planar routing Explain the overview of methods for planar routing
Class 11 Routing (2) minimization of contact vias Explain the overview of methods for minimization of contact vias
Class 12 Routing (3) shortest path routing Explain the overview of methods for shortest path routing
Class 13 Routing (4) channel routing Explain the overview of methods for channel routing
Class 14 Routing (5) special routing Explain the overview of methods for special routing
Class 15 Optimization by modification Explain the overview of optimization methods by modification

Textbook(s)

None

Reference books, course materials, etc.

Handouts will be distributed at the beginning of class when necessary

Assessment criteria and methods

Studnets' level of understanding on the basic layout design methods will be assessed. Learning achievement is evaluated by the quality of the written reports.

Related courses

  • ICT.M215 ： Discrete Structures and Algorithms
  • ICT.M306 ： Concrete Mathematics
  • ICT.M310 ： Mathematical Programming
  • ICT.I415 ： VLSI System Design
  • ICT.A515 ： Theory of Parallel and VLSI Computation

Prerequisites (i.e., required knowledge, skills, courses, etc.)

No prerequisites

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