2017 Fundamentals of Electron Devices

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Academic unit or major
Graduate major in Electrical and Electronic Engineering
Kakushima Kuniyuki 
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Course description and aims

The lecture focuses on understanding the operation of scaled MOS devices based on scaling law and addressing the issues in recent 10-nm-class devices. Listeners will then understand the effectiveness of 3D or high mobility channel devices for high performance with low power consumption applications. Novel devices driven by different operation principle will be reviewed. The lecture will also include memory and image devices.

Student learning outcomes

The performance of VLSI circuits has been improved by downsizing the MOS devices and continuous efforts and technology have been implemented to overcome the scaling limit. The lecture firstly delivers the scaling law of the MOS devices, and introduces the advantages and drawbacks of 3D structures and new channel materials. In addition, novel devices driven by new operating principle will be introduced and the issues will be addressed. Finally, memory and image devices will be discussed. Based upon expected marginal performance of scaled devices, we will discuss the candidate devices for next generation technology


MOS devices, Scaling law, Low power consumption devices

Competencies that will be developed

Specialist skills Intercultural skills Communication skills Critical thinking skills Practical and/or problem-solving skills

Class flow

Lectures will be held based on slides with hand-outs, and each time a report will be posed.

Course schedule/Required learning

  Course schedule Required learning
Class 1 MOS devices and its scaling law Able to understand the device downsizing and its scaling law
Class 2 Issues in scaled MOS devices Able to understand the short channel effect and DIBL in MOS devices
Class 3 Scaled MOS devices: 3D Able to understand device progress from SOI to 3D structures including FinFET and nanowire FET
Class 4 Scaled MOS devices: high mobility channel Able to understand III-V device performance and its interface state issue
Class 5 MOS devices with new operating principal Able to understand device operation principle based on tunnel effect or negative capacitance
Class 6 Memory devices: SRAM, DRAM Able to understand volatile memory including SRAM and DRAM
Class 7 Memory devices: flash, ReRAM Able to understand nonvolatile memory including flash and resistive RAM
Class 8 CMOS image devices Able to understand basics of CCD and CMOS imagers


Y. Taur, T. H. Ning, "Fundamentals of Modern VLSI Devices", Cambridge University Press, ISBN 978-0-521-83294-6

Reference books, course materials, etc.

Hand out will be delivered.

Assessment criteria and methods

Scores based on submitted reports.

Related courses

  • EEE.C441 : VLSI Technology I

Prerequisites (i.e., required knowledge, skills, courses, etc.)

Listeners should understand the basic operation of MOS devices beforehand.

Contact information (e-mail and phone)    Notice : Please replace from "[at]" to "@"(half-width character).

kakushima.k.aa[at]m.titech.ac.jp 045-924-5847

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