2020 Semiconductor Fabrication Process

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Academic unit or major
Undergraduate major in Electrical and Electronic Engineering
Instructor(s)
Ohmi Shun-Ichiro 
Class Format
Lecture    (ZOOM)
Media-enhanced courses
Day/Period(Room No.)
Tue5-6(S223)  
Group
-
Course number
EEE.D391
Credits
1
Academic year
2020
Offered quarter
3Q
Syllabus updated
2020/9/18
Lecture notes updated
-
Language used
Japanese
Access Index

Course description and aims

Principles and limitations of micro-fabrication process in semiconductor devices for high-speed operation are described. After explanation of requirement of simultaneous miniaturization in vertical direction and lateral dsirection for high speed operations, latest technology with focus on lithography are explained. Then, diffusionregion, etching, oxidation, film deposition, and metallization are described.

Student learning outcomes

By the end of this course, students will be able to:
1) Explain outlines of semiconductor processes which fabricated integrated circuit for popularization of low-cost and high-speed electric circuits.
2) Understand the guidelines for higher integration and speed.
3) Understand the method for miniaturization based on the scaling from principle operation of MOSFETs.

Keywords

Lithography, diffusion region, etching, oxidation, film deposition, metallization

Competencies that will be developed

Specialist skills Intercultural skills Communication skills Critical thinking skills Practical and/or problem-solving skills
・Applied specialist skills on EEE

Class flow

Because of the large amount of knowledge, basic problems will be explained during the lecture. Any textbook or notebook is able to be used for the examination.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Requirements of semiconductor fabrication process and basis of optical lithography Calculation of diffraction images with or without alternative phase shift method
Class 2 Present and future status of optical lithography and electron beam lithography Calculation of proximity correction in electron beam lithography
Class 3 Short channel effect and doped region Evaluation of contact resistivity
Class 4 Scaling and oxide Calculation of SiO2 thickness
Class 5 Strained silicon, multi-gate, crystal growth, SOI、etching Anisotropic etching of Si
Class 6 Present memory structure, delay of wiring, TSV, deposition Calculation of wiring delay
Class 7 Examination

Out-of-Class Study Time (Preparation and Review)

To enhance effective learning, students are encouraged to spend approximately 100 minutes preparing for class and another 100 minutes reviewing class content afterwards (including assignments) for each class.
They should do so by referring to textbooks and other course material.

Textbook(s)

N/A

Reference books, course materials, etc.

Distributed by OCW-i

Assessment criteria and methods

Evaluate based on the students' knowledge of semiconductor processes.
Report 20%, Examination 80%

Related courses

  • EEE.D351 : Electron Devices I
  • EEE.D352 : Electron Devices II

Prerequisites (i.e., required knowledge, skills, courses, etc.)

NA

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