Principles and limitations of micro-fabrication process in semiconductor devices for high-speed operation are described. After explanation of requirement of simultaneous miniaturization in vertical direction and lateral direction for high speed operations, latest technology with focus on lithography are explained. Then, formation of doped region, etching, oxidation, film formation, electrode and wiring are described.
By the end of this course, students will be able to:
1) Explain outlines of semiconductor processes which fabricated integrated circuit for popularization of cheap and high-speed electric circuits.
2) Understand the guidelines for more integration and higher speed.
3) Understand the method for miniaturization based on the scaling from principle operation of MOSFETs.
Corresponding educational goals are:
(1) Specialist skills Fundamental specialist skills
(4) Applied skills (inquisitive thinking and/or problem-finding skills) Organization and analysis
(7) Skills acquiring a wide range of expertise, and expanding it into more advanced and other specialized areas
Lithography, formation of doped region, etching, oxidation, film formation, electrode, wiring
|✔ Specialist skills||Intercultural skills||Communication skills||✔ Critical thinking skills||Practical and/or problem-solving skills|
Because treated amount of knowledge is huge, each lecture asks simple calculation as homework. Any textbook or notebook can be used as reference in test level of understanding.
|Course schedule||Required learning|
|Class 1||Requirements of semiconductor fabrication process and basis of optical lithography||Calculation of diffraction images with or without alternative phase shift method|
|Class 2||Present and future status of optical lithography and electron beam lithography||Calculation of proximity correction in electron beam lithography|
|Class 3||Short channel effect and doped region||Evaluation of contact by transfer line method|
|Class 4||Scaling and oxide||Calculation of SiO2 oxide thickness by some conditions|
|Class 5||Strained silicon, multi-gate, crystal growth, SOI、etching||Anisotropic etching of Si|
|Class 6||Present memory structure, delay of wiring, TSV, deposition||Calculation of wiring delay|
|Class 7||Electrode and wiring||TFT requirement|
|Class 8||Test level of understanding with exercise problems and summary of the course - Solve exercise problems -||Test level of understanding and self-evaluate achievement for classes 1–7.|
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Evaluate based on the students' knowledge of semiconductor processes.
42 %: Sum of homework, 58%:Test level of understanding