2018 Semiconductor Fabrication Process

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Academic unit or major
Undergraduate major in Electrical and Electronic Engineering
Miyamoto Yasuyuki 
Class Format
Media-enhanced courses
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Syllabus updated
Lecture notes updated
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Course description and aims

Principles and limitations of micro-fabrication process in semiconductor devices for high-speed operation are described. After explanation of requirement of simultaneous miniaturization in vertical direction and lateral direction for high speed operations, latest technology with focus on lithography are explained. Then, formation of doped region, etching, oxidation, film formation, electrode and wiring are described.

Student learning outcomes

By the end of this course, students will be able to:
1) Explain outlines of semiconductor processes which fabricated integrated circuit for popularization of cheap and high-speed electric circuits.
2) Understand the guidelines for more integration and higher speed.
3) Understand the method for miniaturization based on the scaling from principle operation of MOSFETs.


Lithography, formation of doped region, etching, oxidation, film formation, electrode, wiring

Competencies that will be developed

Specialist skills Intercultural skills Communication skills Critical thinking skills Practical and/or problem-solving skills

Class flow

Because treated amount of knowledge is huge, each lecture asks simple calculation as homework. Any textbook or notebook can be used as reference in test level of understanding.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Requirements of semiconductor fabrication process and basis of optical lithography Relation between diffraction image and process factor k1
Class 2 Present status of optical lithography (with resist) Calculation of images by alternative phase shift method
Class 3 Present status of electron beam lithography (with resist) Calculation of proximity correction
Class 4 NGL and formation of doped region Calculation of Stopping and Range of Ions in Matter.
Class 5 Etching and oxidation process Calculation of SiO2 oxide thickness by some conditions
Class 6 Film formation Change of deposition rate by change of stagnant layer thickness in CVD
Class 7 Electrode and wiring Evaluation of contact by transfer line method
Class 8 Test level of understanding with exercise problems and summary of the course - Solve exercise problems - Test level of understanding and self-evaluate achievement for classes 1–7.



Reference books, course materials, etc.

Distributed by OCW-i

Assessment criteria and methods

Evaluate based on the students' knowledge of semiconductor processes.
42 %: Sum of homework, 58%:Test level of understanding

Related courses

  • EEE.D351 : Electron Devices I
  • EEE.D352 : Electron Devices II

Prerequisites (i.e., required knowledge, skills, courses, etc.)


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