Print

2016　Digital Electronic Circuits

Font size  SML

Register update notification mail Add to favorite lecture list
Academic unit or major
Undergraduate major in Electrical and Electronic Engineering
Instructor(s)
Manaka Takaaki  Tabaru Marie 
Class Format
Lecture     
Media-enhanced courses
Day/Period(Room No.)
Mon5-6(S222)  Thr5-6(S222)  
Group
-
Course number
EEE.C321
Credits
2
Academic year
2016
Offered quarter
1Q
Syllabus updated
2016/4/27
Lecture notes updated
2016/6/2
Language used
Japanese
Access Index

Course description and aims

This course focuses on the fundamentals of digital circuit. Topics include binary number, logical algebra and its calculation, basic logic gate, combinational logic circuit, sequential circuit, arithmetic circuit and synchronous logic circuit. Most of electronic devices consists of digital circuit technique. By combining lectures and exercises, the course enables students to understand and acquire the fundamentals of logic circuit so that students can design a simple circuit. Students will experience the satisfaction of solving practical circuit problems by using their knowledge regarding a logic circuit acquired through this course.

Student learning outcomes

By the end of this course, students will be able to:
1) Understand and explain the fundamentals of logical algebra and logic gates.
2) Understand and design a simple logic circuit by using hardware description language (HDL).
3) Analyze and design a simple combinational logic circuit.
4) Analyze and design a simple sequential logic circuit.
5) Analyze and design a simple arithmetic logic circuit.
6) Explain memory and bus arrangement.

Keywords

Digital circuit, logic circuit, logical algebra, HDL, combinational logic circuit, flip-flop, sequential circuit, adder circuit, synchronous circuit

Competencies that will be developed

✔ Specialist skills Intercultural skills Communication skills Critical thinking skills ✔ Practical and/or problem-solving skills

Class flow

At the beginning of each class, solutions to exercise problems that were given at the previous class are reviewed. Towards the end of class, students are given exercise problems related to the lecture given that day to solve. To prepare for class, students should read the course schedule section and check what topics will be covered. Required learning should be completed outside of the classroom for preparation and review purposes.

Course schedule/Required learning

  Course schedule Required learning
Class 1 Digital information Understand binary calculation, digital and analog and parity
Class 2 Logical algebra Understand　Boolean algebra, De Morgan's law and simplification of equation
Class 3 Fundamental logic circuit Understand logic gate and truth table
Class 4 Hardware description language (HDL) Understand description of HDL, Making module
Class 5 Combinational logic circuit1: exclusive or, Karnaugh map Understand exclusive or, and Karnaugh map
Class 6 Combinational logic circuit2: selection circuit, comparator circuit, encoder, decoder, parity circuit Understand selection circuit, comparator circuit, encoder, decoder and parity circuit
Class 7 Time delay and electricity consumption Understand electrical properties of digital ICs, propagation delay time
Class 8 Test level of understanding with exercise problems and summary of the first part of the course Test level of understanding and evaluate achievement for classes 1–7.
Class 9 Flip-flop RS flip-flop, JK flip-flop, synchronous and asynchronous
Class 10 Sequential circuit1: register, shift-register, counter Understand shift-register and counter circuit
Class 11 Sequential circuit2: design sequential circuit Design N-ary counter
Class 12 Operation circuit1: adder circuit, subtracting circuit Understand half adder, full adder circuit, subtracting circuit
Class 13 Operation circuit2: Multiplying and dividing circuit, ALU Understand accumulator and ALU
Class 14 Memory and bus arrangement Understand memory circuit and various bus
Class 15 Synchronous circuit Counter and register with enable

Textbook(s)

並木秀明　「デジタル回路とVerilog HDL」技術評論社

Reference books, course materials, etc.

Not specified

Assessment criteria and methods

Midterm exam (50%), final exam (50%)

Related courses

  • EEE.C331 ： Computer Architecture (Electrical and Electronic Engineering)

Prerequisites (i.e., required knowledge, skills, courses, etc.)

None

Page Top