This lab exercise contains a software part (assembly programming) and a hardware part (logic design) where each exercise will be conducted in groups of 3 - 4 students. In the second part, each group will conduct a project of their choice starting from project planning, design, and documentation to experience group work.
Obtain knowledge of 16-bit microprocessor instruction set and assembly programming skills.
Obtain skills for designing and simulating microprocessors in a hardware description language.
Obtain skills for verifying microprocessors on FPGA board.
Experience group work on microprocessor design project.
Processor, instruction set, assembly language, FPGA, Verilog
✔ Specialist skills | Intercultural skills | ✔ Communication skills | ✔ Critical thinking skills | ✔ Practical and/or problem-solving skills |
Each lab exercise will be conducted in groups of 3 - 4 students, as well as report submission.
The first part consists of assignments, and the second part consists of free project
Course schedule | Required learning | |
---|---|---|
Class 1 | Assembly programming 1 : instruction set, instruction format, assembly language | Understanding assembly language |
Class 2 | Assembly programming 2 : multiplication program, division program | Writing assembly programs |
Class 3 | Assembly programming 3 : prime calculation program | |
Class 4 | Assembly programming 4 : sample program analysis (calculator program, IO program) | |
Class 5 | Hardware description language 1 : Verilog language | Understanding Verilog language |
Class 6 | Hardware description language 2 : Design hierarchy of processor description | Understanding Verilog hierarchical structure |
Class 7 | Hardware description language 3 : instruction execution description | Understanding Verilog behavior description |
Class 8 | Hardware description language 4 : Verilog simulation | Understanding Verilog Simulator |
Class 9 | FPGA board processor implementation 1 : running the processor on FPGA board | Understanding FPGA board |
Class 10 | FPGA board processor implementation 2 : connecting 2 FPGA boards | |
Class 11 | Advanced processor exercise 1 : project planning, task assignment, scheduling | Project planning |
Class 12 | Advanced processor exercise 2 : specification design | Specification design |
Class 13 | Advanced processor exercise 3 : design implementation | design implementation |
Class 14 | Advanced processor exercise 4 : design verification | design verification |
Class 15 | Advanced processor exercise 5 : design analysis, documentation | design analysis, documentation |
None
Lab textbook will be provided
report submission (each group of 3 - 4 students)
Basic knowledge of logic design is required