This class provides the fundamentals of advanced nanoscale MOS transistors. Firstly, the operation of MOS transistors on bulk Si substrate will be explained. The impact of shrinking device dimensions on device performance will be discussed. Then, the concept of equivalent scaling, which is important in modern MOS transistors, will be introduced. As an example of the equivalent scaling, mobility booster technologies and high-k and metal gate stack will be shown.
The objectives of this class are 1) to understand the operation principle of MOS Transistors and 2) to know how to desing MOSFETs to achieve higher performance. Advanced technologies such as stress engineering, high-k gate dielectrics, metal gate electrode, and new channel materials will be introduced. For each technology, not only advantages but also technical issues which should be overcome will be addressed. By taking this class, students are expected to get familiar with technologies of modern, advanced CMOS devices and physics behind nanoscaled transistors.
1. MOS Transistors (Operation Principle, Scaling of Device Dimension)
2. Three-dimensional Transistors (SOI FETs, FinFETs, Double-Gate FETs)
3. Carrier Transport in MOS Transistors with Emphasis on Mobility
4. Mobility Booster Technologies (Stressed FETs)
5. High-k and Metal Gate Electrode
6. Fabrication Processes of Advanced CMOS Devices
7. Ballistic MOSFETs
Y. Taur and T.H. Ning, ''Fundamentals of Modern VLSI Devices,'' Cambridge, 1998.
C. Hamaguchi, ''Basic Semiconductor Physics,'' Springer, 2001.
Basics of Semiconductor Physics
Fundamentals of Electrodynamics
Exercises during the class (40%)
Term-end Exam. (60%)
Exercises will be held as needed.
Anytime, with permission by e-mail at
uchidak (at) neo.pe.titech.ac.jp for Assoc. Prof. Ken Uchida